| PART |
Description |
Maker |
| CY7C1518KV18-300BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| LC3564B LC3564BM LC3564BS LC3564BT LC3564BT-10 LC3 |
x8 SRAM
64K (8192-word 8-bit) SRAM with OE, CE1, and CE2 Control Pins
64K (8192-word ? 8-bit) SRAM with OE, CE1, and CE2 Control Pins
64K (8192-word x8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control Pins
64K (8192-word x 8-bit) SRAM with NOT OE, NOT CE1, and CE2 Control Pins
64K (8192-word 8-bit) SRAM with OE / CE1 / and CE2 Control Pins
64K (8192-word ′ 8-bit) SRAM with OE, CE1, and CE2 Control Pins
64K (8192-word 8-bit) SRAM with OE, CE1, and CE2 Control Pins 64K的（8192字?8位）与光电，CE1上SRAM和控制引脚铈
|
SANYO[Sanyo Semicon Device]
Sanyo Electric Co.,Ltd.
Sanyo Electric Co., Ltd.
|
| CY7C1314BV18-167BZXC |
18-Mbit QDRII SRAM 2 Word Burst Architecture 512K X 36 QDR SRAM, 0.5 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| UPD44325092BF5-E33-FQ1 PD44325092B-15 |
4M X 9 QDR SRAM, 0.45 ns, PBGA165
36M-BIT QDRTM II SRAM 2-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
| CAT93C46AJ CAT93C46AJI CAT93C46AJI-2.5 CAT93C46AJ- |
72-Mbit QDR™-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
72-Mbit QDR™-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
256K (32K x 8) Static RAM
256 Kb (256K x 1) Static RAM
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
Microwire Serial EEPROM 微型导线串行EEPROM
|
Atmel, Corp.
|
| CY7C1263V18-300BZI |
36-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 18 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1568KV18-500BZXC CY7C1568KV18-500BZC CY7C1570K |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| M5M4V16169DTP-10 M5M4V16169DTP-7 M5M4V16169DTP-8 M |
16MCDRAM:16M(1M-WORD BY 16-BIT) CACHED DRAM WITH 16K (1024-WORD BY 16-BIT) SRAM
|
MITSUBISHI[Mitsubishi Electric Semiconductor]
|
| R1Q3A3609BBG-60R R1Q3A3636BBG-60R R1Q3A3636BBG-50R |
36-Mbit QDR垄芒II SRAM 4-word Burst
36-Mbit QDR?II SRAM 4-word Burst
|
Renesas Electronics Corporation
http://
|
| R1Q2A3636ABG60RB0 R1Q3A3636ABG60RB0 R1Q4A3636ABG60 |
36-Mbit QDR⑩II SRAM 2-word Burst
36-Mbit QDR垄芒II SRAM 2-word Burst
|
Renesas Electronics Corporation
|
| CY7C1514V18 CY7C1514V18-200BZC CY7C1514V18-250BZC |
72-Mbit QDR-II?SRAM 2-Word Burst Architecture
72-Mbit QDR-II(TM) SRAM 2-Word Burst Architecture
72-Mbit QDR-II⑩ SRAM 2-Word Burst Architecture
72-MBIT QDR-II⒙ SRAM 2-WORD BURST ARCHITECTURE
72-Mbit QDR-II SRAM 2-Word Burst Architecture
|
CYPRESS[Cypress Semiconductor]
|
